Random Accesses

GPU Computing 2.0 is upon us. Today at the NVIDIA GPU Technology Conference in San Jose, Calif., company CEO Jen-Hsun Huang unveiled a seriously revamped graphics processor architecture representing the biggest step forward for general-purpose GPU computing since the introduction of CUDA in 2006. The stated goal behind the new architecture is two-fold: to significantly boost GPU computing performance and to expand the application range of the graphics processor.

The new architecture, codenamed "Fermi," incorporates a number of new features aimed at technical computing, including support for Error Correcting Code (ECC) memory and greatly enhanced double precision (DP) floating point performance. Those additions remove the two major limitations of current GPU architectures for the high performance computing realm, and position the new GPU as a true general-purpose floating point accelerator.

Source: http://www.hpcwire.com/features/NVIDIA-Takes-GPU-Computing-to-the-Next-Level-62800147.html

Researchers at Sandia National Laboratories uncovered performance issues during simulations of multi processors; they found that when the number of processor cores on an individual chip is increased, it impairs the performance of complex applications. In a world where the achievement of the supercomputer is paramount, the team at Sandia simulated key algorithms for deriving information from large data sets only to find a significant decrease in speed when the system exceeded eight multicores.

The results of the simulations revealed a considerable boost in speed with the transition from two to four multicores but an immaterial increase from four to eight multicores. When platforms with over eight multicores were tested, performance started to decrease - by sixteen multicores, the total speed was at par with the performance of only two multicores. As more chips were added, the team registered an even steeper decline.

Source: http://thefutureofthings.com/news/6937/the-multicore-dilemma.html

Intel Corporation introduced its most advanced desktop processor ever, the Intel Core i7 processor. The Core i7 processor is the first member of a new family of Nehalem processor designs and is the most sophisticated ever built, with new technologies that boost performance on demand and maximize data throughput. The Core i7 processor speeds video editing, immersive games and other popular Internet and computer activities by up to 40 percent without increasing power consumption.

Broadly heralded by the computing industry as a technical marvel, the Intel Core i7 processor holds a new world record of 117 for the SPECint_base_rate2006 benchmark test that measures the performance of a processor. This is the first time ever for any single processor to exceed a score of 100 points.

Source: http://www.physorg.com/news146241216.html

University of Rochester researchers have developed the first true 3-D processor and it runs today at 1.4 GHz. Previous attempts to build 3-D chips simply stacked identical processors on the top of one another. On the contrary, the new 3-D chip, dubbed the ‘Rochester Cube,’ was specifically designed to optimize all key processing functions vertically. And each layer could have a different function.

For example, this kind of 3-D processor could have a layer dedicated to conversion of an MP3 file and another one to provide information about light to your digital camera. Will we ever use these processors? Time will tell.

The team is using wafer bonding as the target technology for 3-D systems, where face-to-face bonding is employed with two physical planes bonded with adhesive materials or metal pads. But back-to-face bonding can also be used.

Source: http://blogs.zdnet.com/emergingtech/?p=1038

Intel's pre-IDF briefing today( March 18 2008) offered a significant look at the chip giant's roadmap for 2008-2009, as well as some specific information on upcoming products that the company has previously kept quiet. Tukwila, Larrabee, Dunnington, and Nehalem were all topics of conversation as Intel laid out its 2008 strategy.

Tukwila wasn't a major topic of conversation, but senior vice president Pat Gelsinger did briefly discuss the capabilities of the upcoming IA-64 processor. Tukwila will be a quad-core chip with a total of 30MB of cache, will include Intel's QPI (Quick Path Interconnect), and will feature dual integrated memory controllers. Intel's official estimate is that the new architecture will offer up to 1.9x the performance of a dual-core Itanium 9100-series processor.

Dunnington, meanwhile, is the company's upcoming 45nm MP part. As we've previously reported, Dunnington will be a six-core design carrying a total of 16MB of L3. Asked why Intel chose to build a six-core part rather than a large-cache quad-core or a small-cache octal-core, Gelsinger responded that the six-core, medium-cache architecture of Dunnington represented the best balance between cache, core count, and die size.

Source: http://arstechnica.com/news.ars/post/20080318-what-chips-may-comeintel-lifts-curtain-on-upcoming-cpus.html