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It accords with the canonial high-speed converter of interface of newest JEDEC that NXP introduces

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Recently, NXP Semiconductors (kindness intelligent Pu's semiconductor) Announce that it accords with the canonial high-speed data converter of serial interface of newest JEDEC JESD204A to introduce with all strength. The intersection of kindness and by new the intersection of high speed and 16 analog-digital converters (ADC) product mix that appear on the market soon Pu intelligently And digital-analogue converter (DAC) Make up, based on JEDEC data converter this kind of head the list of signers product become in the homologous series. Strong



Recently, NXP Semiconductors (kindness intelligent Pu's semiconductor) Announce that it accords with the canonial high-speed data converter of serial interface of newest JEDEC JESD204A to introduce with all strength. The intersection of kindness and by new the intersection of high speed and 16 analog-digital converters (ADC) product mix that appear on the market soon Pu intelligently And digital-analogue converter (DAC) Make up, based on JEDEC data converter this kind of head the list of signers product become in the homologous series.

Emphasize it observe the intersection of JEDEC and the intersection of interface and canonial commitment, kindness Pu join IEEE microwave theory and technological association (MTT-S) held in Boston next week intelligently /International microwave annual meeting (IMS) ,Platform Pu show that accords with JESD204A canonial data converter intelligently in kindness. Show activity demonstrate the intersection of kindness and DAC1408D650 and interoperability of Xilinx Virtex-5 FPGA Pu intelligently, the former is a kind of double channel, four JESD204A data links, sample the speed to reach DAC of 650 M per second.

Kindness Pu have remarkable the intersection of high input and the intersection of frequency and the intersection of linear scale and characteristic by JEDEC JESD204A ADC and DAC intelligently, can guide and think (Lattice) with the fields lying fallow in rotation , Alt and Laszo (Altera) And is comparable to fairy and think (Xilinx) Realize that interflows in an all-round way when the high cost performance FPGA that is introduced. Compare the digital interface of traditional running side by side, the latest JEDEC serial digital interface has offered the strong cipher scheme to high speed data acquisition engineer. As to 14 double-channel data converters, new JEDEC JESD204A interface only needs to use No. 6 to interconnect signals, but a parallel interface needs to consume whole No. 28 and interconnecting signals, it is obvious JEDEC JESD204A can save about 80% of the trunks.

"Kindness latest compatible serial converter of JESD204A Pu make high-speed the intersection of SIGPROC signal processing and economy of system design improve intelligently. Reduce the intersection of PCB and size and reduce, make that cost reduce greatly to make the intersection of converter and price of itself reduce constantly too while by 20% the intersection of board and number of layers by a wide margin, " Kindness Pu show by simulation and executive vice president of composite signal product division John Croteau intelligently: "Realizing interconnection with JESD204A IP lump with the major FPGA supplier, the manufacturers can introduce the products to the market fast, and benefit because of using the industrial standard framework, cost and supply chain will get more valid control. "

JEDEC JESD204A interface can guarantee the signal completeness of more high interlinkage, offers the error detection function in location of the single bit, and does not need the design which change PCB p-c board and realize the staging of system performance. These technological characteristics have brought the prominent commercial advantage for the system designer too, such as reduce the system cost, raise the system reliability, improve the integrated level of the function, shorten listing time and reduces and designs the complexity etc.. The new data converter is used mainly in fields such as base station of great honeycomb, medical imaging apparatus, high-speed instrument, broadcast equipment of the video, military data acquisition application,etc., prominent the intersection of kindness and untiring efforts to make in order to meet market's of high-speed data converter demands Pu intelligently.

Guide and think of the director Shakeel Peera of marketing of the semi-conductive company's high density FPGA strategy to represent in the fields lying fallow in rotation: "Lay guide can think very glad with the intersection of kindness and cooperation Pu intelligently, guarantee ECP3 FPGA and kindness of us JESD204A of Pu realize the intercommunication of seamless between the data converter intelligently. High added value, baby FPGA combine with high-performance data converter, can help our common customer engaged in the wireless infrastructure to save the cost, reduce the power consumption by a wide margin, do not influence throughput and characteristic either at the same time. "

The intersection of kindness and new the intersection of data converter and until competitive power consumption realize the outstanding dynamic characteristic extremely product mix Pu intelligently, and this is exactly the important factor that the apparatus designer will consider while the customer always has cost to try to improve efficiency, reduce. Rely on the strong capability in products of radio frequency of the dwarf signal, radio frequency power amplifier and high-speed data converter field, kindness Pu can offer from aerial to the processor of the digital basedand inclusive intact the intersection of signal and chain product mix with unique advantage intelligently, help to be engaged in the wireless communication infrastructure OEM manufacturers of LTE, WiMAX and multi-carrier GSM/EDGE system design. Except subdividing the market especially in this, kindness new the intersection of high speed and 16 data converter Pu face industrial the intersection of device design and field all kinds of also intelligently, the above-mentioned field often requires higher linear scale and lower noise coefficient.

Listing time

Kindness JESD204A data converter sample Pu already face the main customer to supply now intelligently. The commercial sample will go on the market in an all-round way from third quarter of 2009.


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